SerDes Design Engineer

职位描述

1. High performance Transceiver design, including data-clock recovery circuit(CDR), AFE and DFE related ISI compensation circuit and adaptation algorithm design, high speed P2S/S2P circuit design.

2. High performance clock circuit and PLL design

3. Analog and calibration related circuit design, including ADC/DAC/Bandgap/LDO and so on.

4. Automotive Serdes circuit design.

任职要求

1.Graduated from famous colleges, above MSEE

2. Over 3 years mixed-signal or analog circuit design experience.

3. Knowledge on automotive system design and ISO26262 development procedure is preferred.

4. Familiar with mixed-signal and analog simulation tools.

5. Familiar with the protocols like PCIE/USB/DP/HDMI/Rapid IO/ MIPI A/C/D/M PHY etc. is preferred.

6. Familiar with Die-to-Die interconnection architecture and algorithm is preferred.

7. Experience on automotive SerDes chip design is preferred.

8. Experience on PHY architecture and algorithm design is preferred.

*公司坚持平等原则，公平公正对待不同背景的员工，包含但不限于国籍、性别、宗教信仰、文化背景等方面，提供平等发展机会，构建多元化人才体系